This invention relates, in general, to the encapsulation of an integrated circuit and more particularly to forming a planar encapsulated surface on an integrated circuit.
Protecting an integrated circuit from an external environment is traditionally accomplished through packaging. Packaging technology is as diverse as the semiconductor circuits protected therein. Wafer processing technologies have greatly increased the complexity of integrated circuit designs. High package pin counts (from hundreds to thousands of pins) and high power dissipation (greater than 50 watts) are a result of the increase in circuit density and performance.
Various types of integrated circuit packages have evolved to accommodate the high pin counts and power dissipation requirements. One such packaging technology is tape automated bonding hereafter known as TAB. TAB is well known in the packaging arts and generally provides high pin counts and flexibility for different user applications. A simple description of a TAB package is an array of tightly spaced leads bonded to an integrated circuit. A frame is sometimes used to hold the lead ends not bonded to the integrated circuit. Also, a polyimide layer is placed on the leads to support the leads.
Access to the back of the integrated circuit in the TAB format simplifies coupling to a heat sink in a multi-chip module or a printed circuit board application. Heat sinks are generally attached to the back surface of the integrated circuit. The front surface of the integrated circuit is the surface on which the semiconductor devices are formed. The front surface faces the printed circuit board to expose the back surface. For example, a TAB package electrically coupled through the bonded leads to a printed circuit board is mounted with the front surface of the integrated circuit facing the printed circuit. A spacer or elastomer is placed between the front surface and the printed circuit board to reduce stress and damage to the integrated circuit. A heat sink couples to the back surface of the integrated circuit and is fastened to the printed circuit board to hold the TAB package in place.
If the front surface of the integrated circuit is left unprotected and directly contacts the spacer material it may be prone to premature failure due to chemical exposure or mechanical damage. To prevent this problem, an encapsulation material is placed on the front surface of the integrated circuit and lead bond areas. The encapsulation material can be an epoxy, silicone, or polyimide, etc. that is placed on the front surface and allowed to flow over the entire surface. The encapsulation material is dispensed non-selectively since manufacturing throughput is critical and results in an irregular and a non-planar surface being formed (on the encapsulation material). The irregularity of the surface of the encapsulation material is caused by filler material in the encapsulation material and viscous flow of the encapsulation material. The non-planar surface of the encapsulation material contacts the spacer material such that the back surface of the integrated circuit is tilted with respect to the heat sink making poor thermal contact. Also, the non-planar surface of the encapsulation material can produce localized areas of stress on the front surface of the integrated circuit affecting circuit performance and reliability. These problems will further result in increased manufacturing time, cost, and be a potential device failure in the field. It would be of great benefit if the surface of the integrated circuit could be protected from an external environment and provide a planar surface.